cbadc.circuit.testbench.OpAmpTestBench
======================================

.. currentmodule:: cbadc.circuit.testbench

.. autoclass:: OpAmpTestBench
   :members:
   :show-inheritance:
   :inherited-members:

   


   
   .. rubric:: Methods

   .. autosummary::
   
      ~OpAmpTestBench.__init__
      ~OpAmpTestBench.add
      ~OpAmpTestBench.add_terminal
      ~OpAmpTestBench.add_terminals
      ~OpAmpTestBench.check_connections
      ~OpAmpTestBench.check_subckt_names
      ~OpAmpTestBench.connect
      ~OpAmpTestBench.connect_upstream
      ~OpAmpTestBench.connects
      ~OpAmpTestBench.get_ngspice
      ~OpAmpTestBench.get_spectre
      ~OpAmpTestBench.get_sub_circuit_definitions
      ~OpAmpTestBench.get_terminals
   
   

   
   
   .. rubric:: Attributes

   .. autosummary::
   
      ~OpAmpTestBench.title
      ~OpAmpTestBench.Xaf
      ~OpAmpTestBench.input_signals
      ~OpAmpTestBench.highlighted_terminals
      ~OpAmpTestBench.Vss
      ~OpAmpTestBench.Vdd
      ~OpAmpTestBench.Vclk
      ~OpAmpTestBench.verilog_ams_library_name
      ~OpAmpTestBench.Aobs
      ~OpAmpTestBench.subckt_name
      ~OpAmpTestBench.instance_name
      ~OpAmpTestBench.comments
      ~OpAmpTestBench.model
   
   

.. _sphx_glr_backref_cbadc.circuit.testbench.OpAmpTestBench: